PADS I/O Designer allows you to filter the Device Window for various clock information. The option is available for Xilinx Virtex families, as specified below. To use clock filtering, select from the menu options:
View > Device > Show Clock Regions: Show Clock Regions (Xilinx Virtex4, QVirtex4, QRVirtex4, Virtex5).
View > Device > Show Local Clocks - IOB Columns: (Xilinx Virtex2, Virtex2p, Spartan3, Spartan3l, Spartan3e, Spartan3a, Spartan3adsp) Show possible clock pins. Move the mouse over the selected pins to see the corresponding clock regions.
View > Device > Show Local Clocks - Interface to CLB Array: (Xilinx Virtex2, Virtex2p, Spartan3, Spartan3l, Spartan3e, Spartan3a, Spartan3adsp) Show possible clock pins. Move the mouse over the selected pins to see the corresponding clock regions.
In order to select an entire clock region for a given pin, follow these steps:
Select Setup > Settings + Filters, and enable Regular expressions.
In the Pins List, right-click the Local clocks column and choose Filter Column from the popup menu.
In the Pins List’s filter edit box enter the desired pin number and press Enter.