Pin Report Files

Pin report files format is vendor-dependent:

Actel (.rpt)

Altera (.pin)

Xilinx (.pad or .csv)

Lattice (.pad)

These files are generated by Place & Route software. PADS I/O Designer uses these files to update pin assignments, signal data and other settings based on the output of the Place & Route tool. PADS I/O Designer does not generate pin report files.

Note
	It is important to save the FPGA database following an import of constraints files (.lpf) or pin report files (.pad) from Lattice. This ensures that the correct bus syntax is applied to all bus members.