Schematic Update

Schematic update is used to update pin assignment changes made in PADS I/O Designer to the DxDesigner or DA/BA schematic database by selecting Export > Schematic Update...

Note
	You must leave enough space around FPGA symbols in the schematic for net stubs to be added by schematic update. If there is not enough room to add net stubs, schematic update returns an error message stating that some nets could not be added, and directs you to update the schematic manually.

This can be used as an alternative to exporting symbols and/or schematics using Export > Schematic and Symbols (see "Exporting Symbols and Schematics"). Using schematic update, any symbols which already exist on the schematic are preserved, they are not replaced with I/O Designer-created symbols.

Using this flow, the pin numbers of the symbols are not swapped. Instead, the net names and net stubs that have been placed on the schematic are swapped.

You can use this function with symbols developed outside PADS I/O Designer, as well as with symbols developed inside PADS I/O Designer.

Note
	Schematic Update does not support Interconnectivity Tables.

Prerequisites

To use this functionality you must initialize PADS I/O Designer and the load the FPGA database, including signals and pin assignments related to the component, from the schematic. You can use the following methods to load the signals and pin assignments:

• Use the PCB Design Wizard option, “Import Signals and assignments only” to import signals and assignments into PADS I/O Designer from the schematic without importing the symbol.

• Use an HDL and/or a Pin Report File for the specific device.

• Use a spreadsheet file with signals and assignments.

Note
	In BA/DA, when running Schematic Update, you must close the sheet you are updating or remove the lock on the sheet. Otherwise, PADS I/O Designer skips the locked sheets, and the requested instance is not found, resulting in an error for each skipped sheet.