Generic symbols are symbols for devices, stored in a Library, whose pin names, pin numbers, fracturing scheme and symbol name do not change from one design to another. PCB-based pin swapping is not used in this flow because FPGA pin swapping rules are design and device-based. The generic symbols in the library are placed directly into the schematic and are not touched by PADS I/O Designer.
When using generic symbols, any pin-assignment changes made by PADS I/O Designer are migrated to the schematic using Export > Schematic Update. This implements the pin assignments made in PADS I/O Designer by adding net name stubs to the symbol on the schematic. The symbol itself is not modified using this process.
Generic Symbols are PCB symbols and not functional blocks. The reason for this is that PADS I/O Designer reads the FPGA vendor delivered libraries and interprets the number of pins, pin numbers, and pin functions for each of the devices in the library. PADS I/O Designer automatically creates basic symbols with appropriate fractures and create the associated parts database (PDB) library files for these symbols with all the appropriate pin mapping information.
The initial settings for the symbol editor may be configured by editing Symbol Editor Settings under Setup > Settings + Symbol Editor.
The label for functional and PCB signals should be set to “Pin Function” for creating generic symbols.